1. Field of the Invention
The present invention relates to an image sensing chip package structure and, more particularly, to an image sensing chip package structure capable of enhancing the production yield.
2. Description of Related Art
As shown in FIG. 1, a conventional CMOS image sensor package structure comprises a substrate 10, an image sensing chip 20, a housing 30, and a lens barrel 40. Several metallization traces 11 are distributed on upper and lower surfaces of the substrate 10. The metallization traces 11 are electrically connected together by plated through vias 12 at two sides of the substrate 10. The image sensing chip 20 has an image sensing area 21. The image sensing chip 20 is fixed on the substrate 10, and is electrically connected to the substrate 10 through the metallization traces 11 by wire bonding. The housing 30 formed by injection molding is adhered to the substrate 10 to enclose the image sensing chip 20. The lens barrel 40 is sleeved in the housing 30, and includes a through hole 41 and an aspheric lens 42. The through hole 41 is unobstructed to a light source so that the light source can pass the aspheric lens 41 and be transmitted to the image sensing chip 20 for imaging.
The above conventional package structure, however, has a primary drawback: glue will flow to the lower surface of the substrate 10 along the plated through vias 12 at the edge sides of the substrate 10 when dispensing glue to the housing 30, resulting in contamination of the substrate 10. If the amount of glue is insufficient, there will be gaps in the seal, causing problems in reliability. Therefore, in order to accomplish higher quality and yield, it is necessary to precisely control the amount of applied glue between the plated through vias 12 and the seal of the housing 30, hence increasing the complexity of the packaging process and the production cost.